106 research outputs found

    Online Train Shunting

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    At the occasion of ATMOS 2012, Tim Nonner and Alexander Souza defined a new train shunting problem that can roughly be described as follows. We are given a train visiting stations in a given order and cars located at some source stations. Each car has a target station. During the trip of the train, the cars are added to the train at their source stations and removed from it at their target stations. An addition or a removal of a car in the strict interior of the train incurs a cost higher than when the operation is performed at the end of the train. The problem consists in minimizing the total cost, and thus, at each source station of a car, the position the car takes in the train must be carefully decided. Among other results, Nonner and Souza showed that this problem is polynomially solvable by reducing the problem to the computation of a minimum independent set in a bipartite graph. They worked in the offline setting, i.e. the sources and the targets of all cars are known before the trip of the train starts. We study the online version of the problem, in which cars become known at their source stations. We derive a 2-competitive algorithm and prove than no better ratios are achievable. Other related questions are also addressed

    DAC-less PAM-4 generation in the O-band using a silicon Mach-Zehnder modulator

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    International audienceWe demonstrate 20-Gb/s 4-level pulse amplitude modulation (PAM-4) signal generation using a silicon Mach-Zehnder modulator (MZM) in the O-band. The modulator is driven by two independent binary streams, and the PAM-4 signal is thus generated directly on the chip, avoiding the use of power-hungry digital-to-analog converters (DACs). With optimized amplitude levels of the binary signals applied to the two arms of the MZM, a pre-forward error correction (FEC) bit-error rate (BER) as low as 7.6 × 10 −7 is obtained. In comparison with a commercially available LiNbO 3 modulator, the penalty is only 2 dB at the KP4 FEC threshold of 2.2 × 10 −4

    Generation of electro-optic frequency combs with optimized flatness in a silicon ring resonator modulator

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    The flatness of electro-optic frequency combs (EOFCs) generated in a single silicon ring resonator modulator (RRM) is optimized by employing harmonic superposition of the radio-frequency driving signal. A differential evolution algorithm is employed in conjunction with a simplified model of the RRM for offline optimization of the amplitudes and phases of harmonic driving signals and the operating point of the RRM. The optimized driving signals are then applied to a silicon RRM. EOFCs containing 7 and 9 lines are synthesized with a power imbalance between the lines of 2.9 dB and 5.4 dB, respectively, compared to 9.4 dB for an optimized 5-line comb generated from a single sinusoidal driving signal.Comment: 4 pages, 5 figures, submitted to Optics Letter

    Broadband Fourier-transform silicon nitride spectrometer with wide-area multiaperture input

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    4 pags., 5 figs.Integrated microspectrometers implemented in silicon photonic chips have gathered a great interest for diverse applications such as biological analysis, environmental monitoring, and remote sensing. These applications often demand high spectral resolution, broad operational bandwidth, and large optical throughput. Spatial heterodyne Fourier-transform (SHFT) spectrometers have been proposed to overcome the limited optical throughput of dispersive and speckle-based on-chip spectrometers. However, state-of-the-art SHFT spectrometers in near-infrared achieve large optical throughput only within a narrow operational bandwidth. Here we demonstrate for the first time, to the best of our knowledge, a broadband silicon nitride SHFT spectrometer with the largest light collecting multiaperture input (320 × 410 µm) ever implemented in an SHFT on-chip spectrometer. The device was fabricated using 248 nm deep-ultraviolet lithography, exhibiting over 13 dB of optical throughput improvement compared to a single-aperture device. The measured resolution varies between 29 and 49 pm within the 1260-1600 nm wavelength range.Spanish Ministry of Science and Innovation (MICINN) (RED2018-102768-T, RTI2018-097957-B-C33, TEC2015-71127-C2-1-R (FPI Scholarship BES-2016-077798)); Community of Madrid-FEDER funds (S2018/NMT-4326); Horizon 2020 Research and Innovation Program (Marie Sklodowska-Curie 734331); H2020 European Research Council (ERC POPSTAR 647342); European Commission (H2020- ICT-26127-2017 COSMICC 688516); French Industry Ministry (Nano2022 project under IPCEI program); Agence Nationale de la Recherche (ANR-MIRSPEC-17-CE09-004

    Dual-band fiber-chip grating coupler in a 300 mm silicon-on-insulator platform and 193 nm deep-UV lithography

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    4 pags., 5 figs., 1 tab.Surface grating couplers are fundamental building blocks for coupling the light between optical fibers and integrated photonic devices. However, the operational bandwidth of conventional grating couplers is intrinsically limited by their wavelength-dependent radiation angle. The few dual-band grating couplers that have been experimentally demonstrated exhibit low coupling efficiencies and rely on complex fabrication processes. Here we demonstrate for the first time, to the best of our knowledge, the realization of an efficient dual-band grating coupler fabricated using 193 nm deep-ultraviolet lithography for 10 Gbit symmetric passive optical networks. The footprint of the device is 17 × 10 µm. We measured coupling efficiencies of −4.9 and −5.2 dB with a 3-dB bandwidth of 27 and 56 nm at the wavelengths of 1270 and 1577 nm, corresponding to the upstream and downstream channels, respectively.Spanish Ministry of Science, Innovation and Universities (MICINN) (RTI2018-097957-B-C33, TEC2015-71127-C2-1-R with FPI Scholarship BES-2016-077798); Community of Madrid - FEDER funds (S2018/NMT-4326); Horizon 2020 Research and Innovation Program (Marie Sklodowska-Curie 734331); H2020 European Research Council (ERC POPSTAR 647342); European Commission (H2020- ICT-26127-2017 COSMICC 688516); French Industry Ministry (Nano2022 project under IPCEI program); Agence Nationale de la Recherche (ANR-MIRSPEC-17-CE09-0041)

    MASTAR VA: A predictive and flexible compact model for digital performances evaluation of CMOS technology with conventional CAD tools

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    International audienceThis work presents the methodology employed in order to make the MASTAR model (Model for Assessment of CMOS Technologies And Roadmaps [1]), used within the frame of the International Technology Roadmap for Semiconductor (ITRS), compatible with conventional CAD tools. As an example, we used the updated model together with ELDO for the evaluation of digital and SRAM performance

    Impact of quantum modulation of the inversion charge in the MOSFET subthreshold regime

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    session C5L-E: Quantum Devices and PhenomenaInternational audienceIn this work, the impact of quantum modulation of the charge in the subtreshold regime is investigated for various architectures. Using Hänsch's model, the reduction in threshold voltage roll-off induced by quantum effects in a double gate is investigated. Next, it is demonstrated with Poisson-Schrödinger simulations that there is a quantum-induced increase in sub-threshold swing for an InAs channel compared to a Si channel in a long-channel bulk device. Finally, a correction to the Bulk subthreshold swing classical model is proposed and validated on simulations. The results suggest that, contrary to double-gate devices, quantum modulation of the charge has an impact in the subthreshold regime for bulk architectures

    Impact of short-channel effects on velocity overshoot in MOSFET

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    session 20A: Digital Design and ModelingInternational audienceIn this work, the impact of short-channel effects on velocity overshoot is discussed. Hydrodynamic simulations are first performed to investigate the overshoot behavior under a uniform electric field. Then a spatially varying electric field, which corresponds to the electric field profile in a MOSFET in inversion, is introduced to observe the impact of short-channel effects on velocity overshoot. Finally, SPICE simulations of a ring-oscillator are used to analyze how the combined influence of overshoot and short-channel effects affect the performance of downscaled CMOS technology
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